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Q#1
Combinational Circuits
GATE EC 1991
MCQ
+2 marks
-0.66 marks
A 1-to-8 de-multiplexer with data input , address inputs (with as the LSB) and and as the eight de-multiplexed outputs, is to be designed using two 2-to-4 decoders (with enable input and address inputs and ) as shown in the figure. and are to be connected to P, Q, R and S, but not necessarily in this order. The respective input connections to P, Q, R, and S terminals should be
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| Topic | Questions | Attempted | Correct | |
|---|---|---|---|---|
| Network Analysis | 273 | 0 | 0 | |
| Electronic Devices | 69 | 0 | 0 | |
| Analog Electronics | 395 | 0 | 0 | |
| Digital Electronics | 351 | 0 | 0 | |
| Signals and Systems | 22 | 0 | 0 | |
| Control Systems | 224 | 0 | 0 | |
| Communication System | 200 | 0 | 0 | |
| EMFT - ECE | 14 | 0 | 0 | |
| Engineering Mathematics | 24 | 0 | 0 | |
| General Aptitude | 30 | 0 | 0 |