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Q#1
Sequential Circuits
GATE EC 2002
MSQ
+2 marks
-0 marks
It is required to design a binary mod-5 synchronous counter using AB flip-flops such that the output changes as ….. and so on. The excitation table for the AB flip-flops is given in table 11.
(a) Write down the state table for the mod-5 counter.
(b) Obtain simplified SOP expressions for the inputs, , , , and in terms of and their complements
(c) Hence, complete the circuit diagram for the mod-5 counter given in figure below using minimum number of 2-input NAND-gate only.
state table for the mod-5 counter
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