The logic gates shown in the digital circuit below use strong pull-down NMOS transistors for LOW logic level at the outputs. When the pull-downs are off, high-value resistors set the output logic levels to HIGH (i.e. the pull-ups are weak). Note that some nodes are intentionally shorted to implement -wired logic". Such shorted nodes will be HIGH only if the outputs of all the gates whose outputs are shorted are HIGH.
The number of distinct values of (out of the 16 possible values) that give Y =1 is _______
Sign in to see the solution
Log in to view the explanation, track your attempts, and keep your progress.
Sign in to UnlockBrowse Practice Questions by Chapters / Topics in Browse Practice Questions by Chapters / Topics in GATE Electronics and Communications
Total Questions
Attempted
% Attempted
Correct
% Correct
| Topic | Questions | Attempted | Correct | |
|---|---|---|---|---|
| Network Analysis | 273 | 0 | 0 | |
| Electronic Devices | 69 | 0 | 0 | |
| Analog Electronics | 395 | 0 | 0 | |
| Digital Electronics | 351 | 0 | 0 | |
| Signals and Systems | 22 | 0 | 0 | |
| Control Systems | 224 | 0 | 0 | |
| Communication System | 200 | 0 | 0 | |
| EMFT - ECE | 14 | 0 | 0 | |
| Engineering Mathematics | 24 | 0 | 0 | |
| General Aptitude | 30 | 0 | 0 |

