Loading, please wait...

ExamDost
Learning Portal
Let's Prepare Together!
#PreparationAmplified!
Explore Packages
ExamDost
Learning Portal
 Prep plan My packages

Practice over 1000+ GATE-level questions from this topic!

Designed to match the latest GATE pattern with topic-wise precision, difficulty tagging, and detailed solutions.

Q#1 Logic Family GATE EC 2016 MCQ +1 mark -0.33 marks

Transistor geometries in a CMOS inverter have been adjusted to meet the requirement for worst case charge and discharge times for driving a load capacitor C. This design is to be converted to that of a NOR circuit in the same technology, so that its worst case charge and discharge times while driving the same capacitor are similar. The channel lengths of all transistors are to be kept unchanged. Which one of the following statements is correct?

C:\Users\admin\Desktop\FREELANCER\kreatryx project 1\Project images\Q16-1.jpg

Widths of PMOS transistors should be doubled, while widths of NMOS transistors should be halved.

Widths of PMOS transistors should be doubled, while widths of NMOS transistors should not be changed.

Widths of PMOS transistors should be halved, while widths of NMOS transistors should not be changed.

Widths of PMOS transistors should be unchanged, while widths of NMOS transistors should be halved.

Sign in to see the solution

Log in to view the explanation, track your attempts, and keep your progress.

Sign in to Unlock
Browse Practice Questions by Chapters / Topics in Browse Practice Questions by Chapters / Topics in GATE Electronics and Communications
Total Questions

Attempted

% Attempted

Correct

% Correct

Topic Questions Attempted Correct
Network Analysis 273 0 0
Electronic Devices 69 0 0
Analog Electronics 395 0 0
Digital Electronics 351 0 0
Signals and Systems 22 0 0
Control Systems 224 0 0
Communication System 200 0 0
EMFT - ECE 14 0 0
Engineering Mathematics 24 0 0
General Aptitude 30 0 0
Generate Personalized GATE Electronics and Communications Paper