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Q#1
Network Theorems (DC Circuits)
GATE EE 2009
MCQ
+2 marks
-0.66 marks
For the circuit given above, the Thevenin's resistance across the terminals A and B is
0.5 kΩ
0.2 kΩ
1 kΩ
0.11 kΩ
Explanation:
For Vth, the load terminals must be open circuited as shown below,
Applying KCL at node with voltage ‘V’
+ 
+ 
= 0 -------- (1)
By KVL,
VAB + 3VAB = V
V = 4 VAB --------(2)
from (1) & (2)
+ 
= 0
VAB = 0.5V
For RTh
Calculate IN or ISC
Rth = 
= 
= 
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