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Network Analysis
Network Theorems (DC Circuits)

Practice questions from Network Theorems (DC Circuits).

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Q#1 Network Theorems (DC Circuits) GATE EE 2021 (Set 1) MCQ +1 mark -0.33 marks

For the network shown, the equivalent Thevenin voltage and Thevenin impedance as seen across terminals 'ab' is

Diagram, schematic

Description automatically generated

10 V in series with 12 Ω

65 V in series with 15 Ω

50 V in series with 2 Ω

35 V in series with 2 Ω

Explanation:

Given circuit can be resolved as shown below,

Diagram, schematic

Description automatically generated

Diagram, schematic

Description automatically generated

Vx = 2 + 3 + 10 = 15 V

Alternate method

To determine VOC, we open terminal a & b

         

 i = 0        i1 = 5 A        

By KVL,        

To determine ISC, Short terminals a & b

By KVL,        

Q#2 Network Theorems (DC Circuits) GATE EE 2020 (Set 1) NAT +1 mark -0 marks

The Thevenin equivalent voltage, , in V (rounded off to 2 decimal places) of the network shown below, is

\\169.254.160.58\Kreatryx\DATA\GATE 2020\EE\Question\New Images\Q23.png

Explanation:

Z:\DATA\GATE 2020\EE\Solution\Diagram new\23.jpg

Due to open circuit, there is no current through  resister with  

Hence,  

Apply KCL at V

 

 

Q#3 Network Theorems (DC Circuits) GATE EE 2020 (Set 1) MCQ +2 marks -0.66 marks

A benchtop DC power supply acts as an ideal 4 A current source as long as its terminal voltage is below 10 V. Beyond this point, it begins to behave as an ideal 10 V voltage source for all load currents going down to 0A. When connected to an ideal rheostat, find the load resistance value at which maximum power is transferred, and the corresponding load voltage and current.  

2.5 Ω, 4 A, 10V

2.5 Ω, 4 A, 5V

Open, 4 A, 0 V

Short, ∞A, 10V

Explanation:

Diagram

Description automatically generated with medium confidence

Maximum power transistor of VI product is maximum. If draw the curve, it intersect (10,4) that will give maximum power.

The terminal voltage is 10 V (Load voltage) and current is 4A (Load current).

Load resistance =

Q#4 Network Theorems (DC Circuits) GATE EE 2015 (Set 1) NAT +1 mark -0 marks

For the given circuit, the Thevenin equivalent is to be determined. The Thevenin voltage,  

(in Volt), seen from terminal AB is _____________.

11.jpg

Explanation:

D:\data\Sachin\02.jpg

Since the terminals A & B are extended beyond so it is already opened.

KVL in Loop – 1:

 

                      …………………..(1)

KVL in Loop – 2:

                ………..……..…..(2)

From (1) & (2),

25i = 4

= 3.36 V

Q#5 Network Theorems (DC Circuits) GATE EE 2015 (Set 2) NAT +1 mark -0 marks

The current i(in Ampere) in the  resistor of the given network is _______.

14.jpg

Explanation:

Z:\PY\EE\Redreaw figure\Network\updated\44-23.jpg

Finding Thevenin equivalent across  resistor:

 

By Potential Division,

Current in resistor = 0 A.

Note: If we carefully observe the given circuit, it is nothing but a balanced Wheatstone bridge. Hence, current will be zero.

Q#6 Network Theorems (DC Circuits) GATE EE 2014 (Set 3) MCQ +1 mark -0.33 marks

A non-ideal voltage source has an internal impedance of . If a purely resistive load is to be chosen that maximizes the power transferred to the load, its value must be

0

real part of

magnitude of  

complex conjugate of

Explanation:

For maximum power transfer, the resistive load should have the magnitude equal to impedance magnitude.

Q#7 Network Theorems (DC Circuits) GATE EE 2014 (Set 3) NAT +2 marks -0 marks

The Norton’s equivalent source in amperes as seen into the terminals X and Y is__________.

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2014\Gate-EE-2014_3\EE03_2014 images\18.jpg

Explanation:

To determine Norton’s Current, short circuit the XY terminals

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Solutions\network\14,15,16 Images\29.jpg

Using Mesh analysis,

For first loop:        

 

2.5 = 5  – 2.5    ……………..(1)  

For second loop:        

2.5 = 7.5  – 5     …………….(2)

Adding (1) & (2),

5 = 5 

 = 1A and ISC=1A

Q#8 Network Theorems (DC Circuits) GATE EE 2013 (Set 1) MCQ +1 mark -0.33 marks

A source  has an internal impedance of . If a purely resistive load connected to this source has to extract the maximum power out of the source, its value in Ω should beA source  has an internal impedance of . If a purely resistive load connected to this source has to extract the maximum power out of the source, its value in Ω should be

3

4

5

7

Explanation:

Since, from maximum power transfer theorem for maximum power to be transferred in load

1.jpg

Q#9 Network Theorems (DC Circuits) GATE EE 2012 (Set 1) MCQ +1 mark -0.33 marks

The impedance looking into nodes 1 and 2 in the given circuit is

2.jpg

Explanation:

This circuit doesn’t have any independent source, so to find out thvenin’s equivalent resistance across 1 & 2 connect a 1 volt voltage source across the terminals and find the current (I) through voltage source. The circuit can be redrawn as,

Applying KCL at node A

                ---------- (1)

Apply KCL at node B

                -----------(2)

Using (1)

                -----------(3)

Applying KVL in the loop

                -----------(4)

Also

                ----------(5)

From 3, 4 & 5 -

Q#10 Network Theorems (DC Circuits) GATE EE 2012 (Set 1) MCQ +2 marks -0.66 marks

With 10V dc connected at port A in the linear nonreciprocal two-port network shown below, the following were observed:

(i)  connected at port B draws a current of 3A

(ii)  connected at port B draws a current of 2A

22.jpg

For the same network, with 6V dc connected at port A,  connected at port B draws 7/3A. If 8V dc connected to port A, the open circuit voltage at port B is

6V

7V

8V

9V

Explanation:

Representing the two port network by its Thevenin Equivalent,        

16.jpg

Case-1: 

        

                ---------(1)

Case 2: 

                ----------(2)

From 1 & 2         

From equation (1)

The Thevenin Voltage will depend on the applied voltage. Since, the network is linear.

Hence,

Case-1:

                        ----------(3)

Case-2:

                ----------(4)

Solving (3) and (4) we get,

a = 0.5 and b = 4

When 8V DC Voltage is applied,

Q#11 Network Theorems (DC Circuits) GATE EE 2012 (Set 1) MCQ +2 marks -0.66 marks

With 10V dc connected at port A in the linear nonreciprocal two-port network shown below, the following were observed:

(i)  connected at port B draws a current of 3A

(ii)  connected at port B draws a current of 2A

22.jpg

With 10V dc connected at port A, the current drawn by  connected at port B is

3/7A

5/7A

1A

9/7A

Explanation:

17.jpg

Since, DC Voltage is 10V so

Now if

Q#12 Network Theorems (DC Circuits) GATE EE 2011 (Set 1) MCQ +1 mark -0.33 marks

In the circuit given below, the value of R required for the transfer of maximum power to the load having a resistance of  is

23.jpg

Zero

Infinity

Explanation:

Since, variable resistance is in source side and load resistance is fixed.

22.jpg

So for maximum power to be transferred in a fixed load  

resistance, the current should be maximum for maximum current to be delivered from 10V source variable resistance R should be zero.

R=0

Note: Maximum Power Transfer Theorem can only be applied when the load resistance is variable. Also, this can be derived by deriving the load power in terms of ‘R’ and then finding the maxima of the function but that would be a tedious process.

Q#13 Network Theorems (DC Circuits) GATE EE 2010 (Set 1) MCQ +1 mark -0.33 marks

As shown in the figure, a  resistance is connected across a source that has a load line

v + i = 100. The current through the resistance is

3.jpg

25 A

50 A

100 A

200 A

Explanation:

Untitled-3.png                Untitled-4.png

From equation

When i=0 (open circuit)

V=100Volts

Also when V=0 (Short circuit)

i=100A

Thevenin equivalent circuit is

Untitled-5.png

Q#14 Network Theorems (DC Circuits) GATE EE 2009 (Set 1) MCQ +2 marks -0.66 marks

For the circuit shown, find out the current flowing through the 2Ω resistance. Also identify the changes to be made to double the current through the 2Ω resistance.

Q47.jpg

(5A; Put = 20V)

(2A; Put = 8V)

(5A; Put = 10V)

(7A; Put = 12V)

Explanation:

Applying super-position theorem

(i) When only  is considered        (ii) When only  is considered

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Solutions\network\Network\Network\Lokesh_network_09, 10\Untitled-13.png        C:\Users\Ankit\Dropbox\GATE papers\EE papers\Solutions\network\Network\Network\Lokesh_network_09, 10\Untitled-14.png

Since voltage source is shorted in case-2, so entire current will flow through SC

Total current thought  resistor

To double the current through  resistance,

Voltage source  should be doubled as the current source doesn’t have any effect on value of

Q#15 Network Theorems (DC Circuits) GATE EE 2009 (Set 1) MCQ +2 marks -0.66 marks

For the circuit given above, the Thevenin's resistance across the terminals A and B is

Q59.jpg

0.5 kΩ

0.2 kΩ

1 kΩ

0.11 kΩ

Explanation:

For Vth, the load terminals must be open circuited as shown below,

Applying KCL at node with voltage ‘V’

 +  +  = 0                 -------- (1)

By KVL,

VAB + 3VAB = V

V = 4 VAB                                 --------(2)

from (1) & (2)

 +  = 0

VAB = 0.5V

For RTh

Calculate IN or ISC

Rth =  =  =

Q#16 Network Theorems (DC Circuits) GATE EE 2009 (Set 1) MCQ +2 marks -0.66 marks

For the circuit given above, the Thevenin's voltage across the terminals A and B is

Q59.jpg

1.25 V

0.25 V

1 V

0.5 V

Explanation:

For Vth, the load terminals must be open circuited as shown below,

Applying KCL at node with voltage ‘V’

 +  +  = 0                 -------- (1)

By KVL,

VAB + 3VAB = V

V = 4 VAB                                 --------(2)

from (1) & (2)

 +  = 0

VAB = 0.5V

For RTh

Calculate IN or ISC

Rth =  =  =

Q#17 Network Theorems (DC Circuits) GATE EE 2005 (Set 1) MCQ +2 marks -0.66 marks

In Figure, the Thevenin’s equivalent pair (voltage, impedance), as seen at the terminals P-Q, is given by

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Typed\Gate-EE-2005\Figures\Q36.jpg

(2V, 5Ω)

(2V, 7.5Ω)

(4V, 5Ω)

(4V, 7.5Ω)

Explanation:

Untitled-5.png

Short circuiting voltage source

                

Untitled-6.png

For the Thevenin Voltage,                                

Using voltage division rule,

Voltage across resistor,

Q#18 Network Theorems (DC Circuits) GATE EE 2003 (Set 1) MCQ +2 marks -0.66 marks

Two ac sources feed a common variable resistive load as shown in Figure. Under the maximum power transfer condition, the power absorbed by the load resistance RL is

Q33.jpg

2200 W

1250 W

1000 W        

625 W

Explanation:

For maximum power transfer finding Thevenin’s equivalent circuit across

Untitled-5.png

For

For

Untitled-6.png

Applying KVL in loop

The Thevenin Equivalent is shown in the figure.

Untitled-7.png

For maximum transfer in         

Power absorbed by the load

Q#19 Network Theorems (DC Circuits) GATE EE 2000 (Set 1) MCQ +2 marks -0.66 marks

The circuit shown in figure is equivalent to a load of

FIG2.2

4 ohms

2 ohms

Explanation:

The given circuit only has dependent source. Hence, in order to determine the Thevenin Impedance we need to connect a 1V source as shown below,

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Solutions\network\Network 91-01\Network Images\Q_2.2_2.jpg

Current in 4Ω resistor =

Current in 2Ω resistor =

Applying KCL,

Thevenin Resistance,

Q#20 Network Theorems (DC Circuits) GATE EE 1998 (Set 1) MCQ +2 marks -0.66 marks

Viewed from the terminals A, B the following circuit shown in figure can be reduced to an equivalent circuit of a single voltage source series with a single resistance with the following parameters:

D:\1Mayu\Gate-9\JPG\JPG\1998\1998\Q2_2.1.jpg

5 volt source in series with 10Ω resistor

7 volt source in series with 2.4Ω resistor

15 volt source in series with 2.4Ω resistor

7 volt source in series with 10Ω resistor

Explanation:

When the circuit is converted to a voltage source in series with a resistance then it is called as Thevenin Equivalent.

For , voltage sources have been shorted        

47.jpg

        

For

48.jpg

Applying KVL in loop:-

        

Using KVL

 

The Thevenin equivalent circuit is shown below,

49.jpg

Q#21 Network Theorems (DC Circuits) GATE EE 1997 (Set 1) MCQ +2 marks -0.66 marks

For the circuit shown in figure. The Norton equivalent source current value is _________ A and its resistance is _________ Ohms

\(I_N = 4A \ and \ R_N = 4.5\Omega\)

\(I_{N} = 2A \ and \ R_{N} = 5.5\Omega\)

\(I_N = 2A \ and \ R_N = 4.5\Omega\)

\(I_N = 1A \ and \ R_N = 4.5\Omega\)

Explanation:

For : open circuiting the current source and short circuiting the voltage source. The circuit then is shown below,

35.jpg

To determine IN short circuit the terminals AB and apply source transformation we get the circuit as shown below.

36.jpg

Applying KVL in loop 1

                --------------(1)

Applying KVL in loop 2

                --------------(2)

Solving equation 1 & 2

Hence,  and

Q#22 Network Theorems (DC Circuits) GATE EE 1997 (Set 1) MCQ +2 marks -0.66 marks

Find the Thevenin equivalent about AB for the circuit shown in figure

\(\ V_{th}=4A   \ and \  R_{th}=4.5Ω\)

\(\ V_{th}=10A \ and \ R_{th}=4.5Ω\)

\(\ V_{th}=5A \ and \  R_{th}=4.22Ω\)

\(\ V_{th}=10A \  and  \ R_{th}=4.22Ω\)

Explanation:

To determine the Thevenin Equivalent open circuit the terminals A and B.

41.jpg

Due to open circuit, current in 4Ω resistor is 0A.

Using KVL

                        -------------(1)

Applying KCL

                        -------------(2)

Solving equation 1 & 2

 and

For :Applying 1 volts source across terminals AB, and short circuiting independent voltage source.

42.jpg

Applying KCL

 and

Q#23 Network Theorems (DC Circuits) GATE EE 1996 (Set 1) MCQ +1 mark -0.33 marks

The V-I characteristic as seen from the terminal- pair (A, B) of the network of figure is shown in figure. If an inductance of value 6mH is connected across the terminal-pair (A, B), the time constant of the system will be

D:\Vol-2\NT-04.jpg                D:\1Mayu\Gate-9\JPG\JPG\1996\1996\Q 1_9_2.JPG

Unknown, unless the actual network is specified

Explanation:

32.jpg

From the V-I characteristics when terminals

are short circuited V = 0        

At this time

when A & B terminals are open, i.e. I = 0

Under this condition .

Thevenin resistance of the network

=

After connecting inductor across the Thevenin equivalent the circuit is shown below,

33.jpg

Time constant of the RL circuit =

Q#24 Network Theorems (DC Circuits) GATE EE 1995 (Set 1) NAT +2 marks -0 marks

For the circuit shown in figure, find the current through the resistance R connected between points a and b by Thevenin’s theorem.

D:\1Mayu\Gate-9\JPG\JPG\1995\1995\Q4.jpg

Explanation:

Finding Thevenin equivalent circuit

For , short circuit all independent voltage sources.

C:\Users\Ankit\Dropbox\GATE papers\EE papers\Solutions\network\Network 91-01\Network Images\26.jpg

The resistances 5Ω and 15Ω can be combined in parallel as,

 

The network then simplifies to a form shown,         

27.jpg

Hence,

For

28.jpg

Applying KVL in upper loop,

                --------------(1)        

Applying KVL in lower loop

                --------------(2)

Solving equation 1 & 2

,        

29.jpg

Using KVL

So, thevenin equivalent circuit will look like as shown,

So the current through resistor ‘R’

Q#25 Network Theorems (DC Circuits) GATE EE 1994 (Set 1) MCQ +1 mark -0.33 marks

The superposition principle is not applicable to a network containing time-varying resistors
Choose the correct options

True

False

It is applicable for non – linear elements.

None

Explanation:

Superposition theorem is valid for all types of linear circuit having time – varying or time invariant elements. It is not applicable for non – linear elements.

Q#26 Network Theorems (DC Circuits) GATE EE 1991 (Set 1) MCQ +2 marks -0.66 marks

The V-I characteristic as seen from the terminal pair (A,B) of the network of figure (a) is shown figure (b), if a variable resistance  is connected across the terminal pair (A,B), the maximum power that can be supplied to  would be

D:\Vol-2\NT-01.jpg

80W

40W

20W

Indeterminate unless the actual network is given

Explanation:

For maximum power, load resistance should be equal to the venin resistance.

From the characteristics shown,

1.jpg

Open Circuit Voltage, I = 0,

Short Circuit Current,         V = 0         

           …………..(1)        

                 …………..(2)

For maximum power transfer load resistance,        

        

 

Power =